Staff Engineer at ARM working on AI chips. 9+ years across ARM, Qualcomm, and Granite River Labs — VLSI design, SoC integration, and 5+ tape-outs in 6 years. IEEE speaker. Mentor for RTL and ASIC engineers.
Career, technical depth, key projects, and what I actually work on at ARM.
Working sessions for RTL and SoC engineers — focused on thinking, not templates.
Thoughts on RTL design, debugging, integration challenges, and engineering decisions.
Upcoming talks, workshops, and IEEE sessions — VLSI SATA 2026 and more.
Technical depth, soft skills, wisdom from work — and the personal side of how I think and explore.
1:1 mentorship, mock interviews, technical guidance, and RTL training packages.